Back to Results
First PageMeta Content
Central processing unit / Alpha 21264 / CPU cache / Cycles per instruction / Superscalar / Microarchitecture / Parallel computing / FIFO / Instruction set / Computer architecture / Computer hardware / Computing


10th Intl. Symp. on Asynchronous Circuits and Systems (ASYNC), Herakleion, Crete, Apr[removed]Hiding Synchronization Delays in a GALS Processor Microarchitecture∗ Greg Semeraro? , David H. Albonesi‡ , Grigorios Magklis
Add to Reading List

Document Date: 2011-04-01 00:06:22

Open Document

File Size: 245,17 KB

Share Result on Facebook

Company

IBM / ALUs (b) StrongARM SA / Strong ARM SA / Compaq / TSMC / StrongARM SA / Intel / /

Facility

Store Instruction Issue Synchronization Type / Computer Science University of Rochester Rochester / Store Reason / Store Instruction Completion Synchronization Type / Store Instruction Synchronization Type / Store Operation Transfer / Computer Engineering Rochester Institute of Technology Rochester / Store Operation Commit Transfer / Store L2 Cache / Store Operation Domains / Store Queue / /

IndustryTerm

vector floatingpoint applications / synchronous processor / dynamic superscalar processor / access protocol / superscalar processor / energy saving advantages / instruction processing / integer processing core / in-order processor / multimedia applications / 21264like processor / energy / external 100MHz source using on-chip / /

Organization

First-In-First-Out / Department of Electrical and Computer Engineering / National Science Foundation / Computer Science University of Rochester Rochester / US Federal Reserve / Department of Computer Engineering Rochester Institute of Technology Rochester / GALS MCD / /

Person

Michael L. Scott / David H. Albonesi / Steven G. Dropsho / Greg Semeraro / /

Position

driver / scheduler / producer / arbiter / /

Product

Latte W10 Portable Audio Device / /

ProvinceOrState

New York / /

Technology

two Alpha 21264like processor / Alpha / 21264-like processor / simulated Alpha 21264like processor / external 100MHz source using on-chip / in-order processor / adpcm / access protocol / jpeg / 1110-like processor / GALS Processor / dynamic superscalar processor / GSM / simulation / PLL chip / Alpha 21264like processor / superscalar processor / aggressive out-of-order superscalar 21264-like processor / /

SocialTag