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Computing / Altera / Electronics / Stream processing / Electronic engineering / Fabless semiconductor companies / Field-programmable gate array


A Safety Methodology for ADAS Designs in FPGAs WPWhite Paper
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Document Date: 2015-02-12 19:22:43


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File Size: 519,19 KB

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City

San Jose / /

Company

Image Sensor Configuration Diagnostics / Registered Altera Corporation / Altera Corporation / Advanced Driver Assistance Systems / /

Event

FDA Phase / /

IndustryTerm

low-level processing / software complexity / miscellaneous image processing block / signal chain / changes to any products / high-level processing / appropriate algorithms / signal processing chain / anti-lock braking systems / mid-level processing / high-level processing stage / detection algorithm / potential software / low-level and mid-level processing / semiconductor products / low-level processing function / image processor / low-level image processing stage / software diversity / vehicle infrastructure / streaming processing algorithm / digital signal processing / subsequent algorithms / streaming protocol / /

OperatingSystem

L3 / /

Organization

U.S. Patent and Trademark Office / /

Person

ASIL-A FPGA / /

Position

DDR memory controller / SoC Power Supply Voltage Supervisor / DDR controller / /

Product

Mono Front Camera Application Our / AvalonĀ® / /

ProvinceOrState

California / /

Technology

semiconductor / FPGA / image processor / subsequent algorithms / one chip / RAM / electronic stability / Cortex-A9 processor / Image Processing / streaming processing algorithm / Flash / detection algorithm / /

URL

www.altera.com/common/legal.html / www.altera.com / /

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