Back to Results
First PageMeta Content
Computer architecture / CPU cache / Scratchpad memory / Direct memory access / Multi-core processor / Cell / Remote direct memory access / Cache / Scheduling / Computer hardware / Computing / Computer memory


INTERPROCESSOR COMMUNICATION SEEN AS LOAD-STORE INSTRUCTION GENERALIZATION Manolis G.H. Katevenis† Institute of Computer Science, Foundation for Research and Technology - Hellas (FORTH-ICS), Vassilika Vouton, Heraklion
Add to Reading List

Document Date: 2013-12-23 07:16:59

Open Document

File Size: 3,56 MB

Share Result on Facebook

Country

Greece / /

Currency

pence / /

Facility

Katevenis† Institute of Computer Science / STORE INSTRUCTIONS Communication / University of Crete / Store Instruction Mem.1 / /

IndustryTerm

arrival site / interconnection network / cluster computing / chip network / interconnection networking / parallel applications / individual processors / computer systems / receiver software / congestion management / it because applications / off−chip / multi-chip parallel systems / on−chip / consumer processor / interconnection networks / typical current applications / peripheral devices / control processing / parallel processing / media types / zero-copy communication protocols / proper solution / coherence protocol / network-on-chip / cache coherence protocol / cache coherence protocols / on-chip / network interface hardware / server processors / /

OperatingSystem

Unix / /

Organization

LOAD-STORE INSTRUCTION GENERALIZATION Manolis G.H. Katevenis† Institute of Computer Science / University of Crete / Foundation for Research and Technology / /

Position

cache controller / author / architect / MP / single producer / producer / cache-coherent MP / /

Technology

Cache Processor Acc.Engine Processor / cache coherence protocols / For processors / consumer processor / NI prmtv IPC Processor off−chip Processor IPC Processor off−chip / Cache Cache Ctlr on−chip / coherent caches Processor / communicating processors / Processor Local Memory Local Memory Local Memory Processor / IPC protocols / requesting processor / cache memory / server processors / Requesting processors / 58 INTERPROCESSOR COMMUNICATION Add Processor / caching / receiving processor / zero-copy communication protocols / SRAM / operating system / two SRAM chips / shared memory / cache coherence protocol / same coherence protocol / Cell processor / parallel processing / same chip / MP’S Digital processors / CMP / local processor / /

URL

http /

SocialTag