Royal Institute of Technology Department / Campus Haninge / Royal Institute of Technology / Information Technology Laboratory of Electronics / /
IndustryTerm
process network / electronic systems / /
Organization
Institute of Technology Department of Microelectronics and Information Technology Laboratory of Electronics and Computer / ESD Lab / Swedish Foundation for Strategic Research / Institute of Technology / /
Person
Hannu Tenhunen / Eva-Lotta / Ulrika / Ahmed Hemani / Tobias / Andreas Jonasson / Axel Jantsch / Inge Jovik / Sofi / Maria / Ingo Sander / /
Position
Author / Professor / supervisor / Professor / supervisor / /
ProgrammingLanguage
Haskell / C / C++ / /
Technology
system-on-a-chip / VHDL / Information Technology / /
System Modeling and Design Refinement in ForSyDe Ingo Sander Stockholm[removed]Thesis submitted to the Royal Institute of Technology in partial fulfillment