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Hardware architecture
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#	Item
1	SMITH - A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2) A. Bogdanov, M.C. Mertens, C. Paar, J. Pelzl, A. Rupp Horst G¨ortz Institute for IT Security, Ruhr University Bochum, Germany {bogdanov,m Add to Reading List Source URL: www.hyperelliptic.org Language: English - Date: 2006-03-21 11:51:07 Algebra Linear algebra Mathematics Numerical linear algebra Matrices Matrix theory Multiplication Gaussian elimination Matrix multiplication Pivot element Invertible matrix Matrix
2	SMITH A parallel Hardware Architecture for fast Gaussian Elimination over GF(2) Add to Reading List Source URL: www.hyperelliptic.org Language: English - Date: 2006-04-09 07:56:31 Numerical linear algebra Linear algebra Gaussian elimination Matrix Elementary matrix
3	An Efficient Hardware Architecture for Factoring Integers with the Elliptic Curve Method Jens Franke, Thorsten Kleinjung - University of Bonn Christof Paar, Jan Pelzl - University of Bochum Christine Priplata, Colin Stah Add to Reading List Source URL: www.hyperelliptic.org Language: English - Date: 2005-03-13 11:15:51 Cryptography Integer factorization algorithms Lenstra elliptic-curve factorization Quadratic sieve Elliptic-curve cryptography Elliptic curve Integer factorization General number field sieve RSA Trial division
4	An Efficient Hardware Architecture for Factoring Integers with the Elliptic Curve Method Jens Franke1 , Thorsten Kleinjung1 , Christof Paar2 , Jan Pelzl2 , 4 ˇ Christine Priplata3 , Martin Simka Add to Reading List Source URL: www.hyperelliptic.org Language: English - Date: 2005-03-13 11:15:55 Integer factorization algorithms Mathematics Abstract algebra Algebra Lenstra elliptic-curve factorization Quadratic sieve Montgomery modular multiplication Elliptic curve Exceptional case-marking Division algorithm General number field sieve
5	Chelsio T5 Unified Wire Suite for OpenPOWER Accelerate Network & Storage Performance on POWER Architecture What is OpenPOWER? OpenPOWER is an “open source” model for hardware and software solutions, which simplifies Add to Reading List Source URL: www.chelsio.com Language: English - Date: 2015-07-01 10:57:57
6	The Plural Architecture Shared Memory Many-core with Hardware Scheduling Ran Ginosar Technion, Israel September 2013 Add to Reading List Source URL: mcsoc-forum.org Language: English - Date: 2013-10-01 19:38:31
7	of Virginia, SeptemberDITZ87a] D. R. Ditzel and H. R. McLellan, The Hardware Architecture of the CRISP Microprocessor, Proceedings of the 14th Annual Symposium Add to Reading List Source URL: www.cs.fsu.edu - Date: 2016-05-21 11:29:53
8	Experiences Using A Novel Python-Based Hardware Modeling Framework For Computer Architecture Test Chips Christopher Torng, Moyang Wang, Bharath Sudheendra, Nagaraj Murali, Suren Jayasuriya, Shreesha Srinath, Taylor Pritc Add to Reading List Source URL: sites.coecis.cornell.edu - Date: 2016-08-11 02:29:21
9	AN RNS-BASED ARCHITECTURE TARGETING HARDWARE ACCELERATORS FOR MODULAR ARITHMETIC Add to Reading List Source URL: www.inesc-id.pt - Date: 2013-08-06 12:36:31
10	h ±16 Gauss, Ultra Small, Low Noise 3-axis Magnetic Sensor MMC3416xPJ Add to Reading List Source URL: www.memsic.com Language: English - Date: 2014-05-28 14:23:33 IC Device register Computing Computer hardware Computer architecture

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