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Formal methods / Theoretical computer science / Logic in computer science / Systems engineering / Formal verification / Specification / Formal specification / Verification / Simulink / Device driver synthesis and verification
Date: 2014-10-14 21:17:20
Formal methods
Theoretical computer science
Logic in computer science
Systems engineering
Formal verification
Specification
Formal specification
Verification
Simulink
Device driver synthesis and verification

Formal Technical Process Specification and Verification for Automated Production Systems Georg Hackenberg, Alarico Campetelli, Christoph Legat, Jakob Mund, Sabine Teufl and Birgit Vogel-Heuser

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