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City and ILP / Boston / A BDD / C. Boolean / Toronto / San Jose / Boolean / Austin / / Company Xilinx Inc. / Texas Instruments / Lucent Technologies / IBM Austin Research Laboratory / / Currency USD / / / Facility Carnegie Mellon University / IBM Austin Research Laboratory / University of Toronto / University of Michigan / / IndustryTerm possible routing solutions / valid routing solution / legal detailed routing solution / conventional routers / search-based satisfiability / simultaneous placer/routers / Search-based global and detailed routers / possible solutions / layout solution / search-based approaches / search algorithm / search-based techniques / then routing solution / channel routers / satisfiability-based detailed router / performance-oriented simultaneous technology / legal routing solution / min-cut placement algorithms / lower bound algorithm / implicit systematic search / left-edge algorithm / search time / conventional layout tools / / MarketIndex MCNC / S&P/TSX Composite / / NaturalFeature horizontal/vertical channel / / OperatingSystem SunOS / / Organization National Science Foundation / J. Assn / ASIC / Electrical Engineering and Computer Science Department / Carnegie Mellon University / Electrical and Computer Engineering Department / University of Toronto / the University of Michigan / / Person Rob A. Rutenbar / J. S. Swartz / V / A. Hashimoto / J. Greene / V / Joon Nam / J. Stevens / M. Pedram / / Position Editor / / ProvinceOrState Texas / / PublishedMedium IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS / / Technology FPGA / min-cut placement algorithms / detailed router / search algorithm / channel routers / lower bound algorithm / Boolean SAT router / INTEGRATED CIRCUITS / published FPGA routers / simultaneous placer/routers / performance-oriented simultaneous technology / ASIC / satisfiability-based detailed router / conventional FPGA routers / Graph-based algorithms / conventional one-net-at-a-time routers / / URL http / SocialTag 
674 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 21, NO. 6, JUNE 2002