Accelerating Irregular Computations with Hardware Transactional Memory and Active Messages Maciej Besta Torsten Hoefler

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Date: 2015-09-14 07:27:20 Graph theory Mathematics Computing Concurrency control Transaction processing NP-complete problems Computer memory Transactional memory Vertex Breadth-first search Graph coloring Transactional Synchronization Extensions		Accelerating Irregular Computations with Hardware Transactional Memory and Active Messages Maciej Besta Torsten Hoefler Add to Reading List Source URL: htor.inf.ethz.ch Download Document from Source Website File Size: 908,72 KB Share Document on Facebook

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