| Document Date: 2012-07-13 08:51:57
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Company Error Detection Using Hardware / Multi-Processor Systems / Intel / TU Dresden Operating Systems Group / / / Event Product Issues / / Facility Rolf Ernst TU Braunschweig Institute of Computer / / IndustryTerm user-level applications / time-critical applications / mobile communication applications / cache coherency protocol / energy consumption / transient hardware / in-car electronics / lower software layers / static lockstep processor / fault-tolerant systems / manufacturing errors / intensive algorithms / mixed-critical applications / safety-defined systems / software level increases / software reliability mechanisms / Peripheral devices / coupled processors / faster processors / software components / software mechanisms / software-implemented redundant multithreading / cabin management / runtime services / transparent redundant multithreading to critical applications / network-on-chip / car passengers / real-time systems / mixed-criticality applications / in-car safety systems / real-time constraints / / Organization US Federal Reserve / Rolf Ernst TU Braunschweig Institute of Computer and Network Engineering / / Person Rolf Ernst / / Position Replica Replica Replica CPU Exceptions Memory Manager / major driver / virtual address space stack WB / devices and memory controller / Chunk CNT WB / / Product MiBench benchmark suite / MiBench / replica / / ProgrammingLanguage D / FP / / Technology radiation / computationally intensive algorithms / cache coherency protocol / real-time operating system / dynamically coupled processors / ever faster processors / static lockstep processor / smart phones / virtual memory / Operating System / shared memory / 3 processor / mobile devices / /
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Designing an Analyzable and Resilient Embedded Operating System Philip Axer, Rolf Ernst TU Braunschweig Institute of Computer and Network Engineering {axer,ernst}@ida.ing.tu-bs.de