Evaluation of Silicon on Insulator (SOI) Bonded Wafers Using Automated Acoustic Micro Imaging Janet E. Semmens and Bryan P. Schackmuth Sonoscan, IncE. Pratt Boulevard Elk Grove Village, ILUSA

First Page		Document Content
Date: 2016-07-20 11:09:32 Semiconductor device fabrication Materials science Technology Electronic engineering Wafer Silicon on insulator Acoustic microscopy Integrated circuit Three-dimensional integrated circuit Soitec Smart cut		Evaluation of Silicon on Insulator (SOI) Bonded Wafers Using Automated Acoustic Micro Imaging Janet E. Semmens and Bryan P. Schackmuth Sonoscan, IncE. Pratt Boulevard Elk Grove Village, ILUSA Add to Reading List Source URL: www.sonoscan.com Download Document from Source Website File Size: 295,66 KB Share Document on Facebook

	Development of a Resolution Test Wafer for Use in Acoustic Microscopy of Microelectronic Devices Janet E. Semmens1, Rupert Fischer2, and Lawrence W. Kessler1 1 Sonoscan, IncE. Pratt Blvd. DocID: 1s5gm - View Document
	High-Frequency Acoustic Microscopy Studies of Buried Interfaces in Silicon DocID: 1rOnz - View Document
	Technology Opportunity, Ref. No. UAA novel algorithm for phase computation in atomic force microscopy A novel algorithm has been developed which provides highly accurate phase measurements. In particular, the al DocID: 1rmSQ - View Document
	CHARACTERIZATION OF FLIP CHIP BUMP FAILURE MODES USING HIGH FREQUENCY ACOUSTIC MICRO IMAGING Janet E. Semmens and Lawrence W. Kessler SONOSCAN, INC. 530 East Green Street Bensenville, ILU.S.A. DocID: 1ra26 - View Document
	US008720273B2United States Patent Kessler et a1. (54) DocID: 1qZ0u - View Document