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Subroutines / Hardware description languages / Electronic design automation / Electronic engineering / High-level synthesis / Hardware verification languages / Verilog / VHDL / Logic synthesis / Inline expansion / Parameter / Recursion


Hardware Synthesis using SAFL and Application to Processor Design (Invited Talk) Alan Mycroft1,2 and Richard Sharp1 1
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Document Date: 2006-04-13 14:58:00


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File Size: 192,38 KB

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