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Computer networking / P4 / Field-programmable gate array / Packet processing / Hardware description language / Xilinx / Network interface controller / Domain-specific language / Verilog
Date: 2016-08-02 16:10:05
Computer networking
P4
Field-programmable gate array
Packet processing
Hardware description language
Xilinx
Network interface controller
Domain-specific language
Verilog

P4FPGA: High Level Synthesis for Networking Han Wang, Ki Suh Lee, Vishal Shrivastav, Hakim Weatherspoon Cornell University 1 Introduction

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