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Data / Information / Software transactional memory / Serializability / Linearizability / Transactional memory / Lock / Database transaction / Nested transaction / Transaction processing / Concurrency control / Data management


An Integrated Hardware-Software Approach to Flexible Transactional Memory ∗ Arrvindh Shriraman, Michael F. Spear, Hemayet Hossain, Virendra J. Marathe, Sandhya Dwarkadas, and Michael L. Scott
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Document Date: 2007-03-29 04:48:18


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File Size: 683,79 KB

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San Diego / /

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IBM / RTM SOFTWARE / Microsystems Laboratories / Intel / Microsoft / /

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United States / /

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Reorganization / /

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University of Rochester / /

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software system / software transactional memory system / software policy / coherence protocols / conventional coherence protocol / software hybrid / coherence protocol / streamlined software stack / contention management / remote processor / software conventions / software transactional memory / software handlers / stock processors / software convention/agreement / software protocol / simulated web cache / software branches / policy in software / typical hardware / runtime systems / software-controlled conflict detection / alert processor / cache coherence protocol / software control / legacy hardware / /

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Solaris / /

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Michael L. Scott Department of Computer Science / National Science Foundation / University of Rochester / /

Person

Michael F. Spear / Michael L. Scott / /

Position

potentially conflicting writer / cache controller / Polka contention manager / conflicting writer / Multiprocessors General / contention manager / overflow writer / Greedy contention manager / software contention manager / designer / writer / programmer / memory manager / /

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C++ / /

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California / /

Technology

TMESI protocol / classic snoop-based MESI protocol / API / software protocol / cloning / directory-based protocols / PDI-capable processor / operating system / Shared memory / cache coherence protocol / CMP / coherence protocols / conventional coherence protocol / base protocol / MESI coherence protocol / AOUcapable processor / coherence protocol / caching / simulation / remote processor / flash / local processor / /

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