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Electronic engineering / Integrated circuits / Multiplication algorithm / Field-programmable gate array / Application-specific integrated circuit / Arithmetic / Mathematics / Multiplication


CONTACT: Jim Wilson • [removed] • [removed] Fast, Very Low-Power Multiplier Architecture TECH ID #:[removed]Background
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Document Date: 2014-01-31 16:57:22


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File Size: 414,87 KB

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Facility

University of Calgary / /

IndustryTerm

multiplication algorithm / low-power multiplication algorithm / /

Organization

University of Calgary / FPGA / ASIC / /

Person

Jim Wilson / /

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PublishedMedium

IEEE Transactions on Computers / /

Technology

FPGA / VHDL / ASIC / multiplication algorithm / extremely low-power multiplication algorithm / /

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