<--- Back to Details
First PageDocument Content
Theoretical computer science / Helmut Veith / Formal methods / TU Wien / Institute for Applied Information Processing and Communications / Software engineering / Verification / Formal verification / Computing
Date: 2017-06-06 20:45:42
Theoretical computer science
Helmut Veith
Formal methods
TU Wien
Institute for Applied Information Processing and Communications
Software engineering
Verification
Formal verification
Computing

RESEARCH LINES Mapping SHiNE RiSE Rigorous Systems Engineering

Add to Reading List

Source URL: www.eziobartocci.com

Download Document from Source Website

File Size: 1,13 MB

Share Document on Facebook

Similar Documents

A Guide to Quantified Propositional G¨ odel Logic Matthias Baaz? , Agata Ciabattoni?? , Norbert Preining? , and Helmut Veith ???

DocID: 1v9rl - View Document

What You Always Wanted to Know about Model Checking of Fault-Tolerant Distributed Algorithms? Igor Konnov, Helmut Veith, and Josef Widder TU Wien (Vienna University of Technology)

DocID: 1sZwk - View Document

Challenges in Model Checking of Fault-tolerant Designs in TLA+ Igor Konnov, Helmut Veith, and Josef Widder TU Wien (Vienna University of Technology) Abstract. Although, historically, fault tolerance is connected to safe

DocID: 1sYGj - View Document

Helmut Veith “Und wenn Du dich getröstet hast, wirst Du froh sein, mich gekannt zu haben.

DocID: 1sS1v - View Document

On March 12th 2016, Prof. Helmut Veith has unexpectedly passed away after a short and severe illness. We, the students of the Doctoral College Logical Methods in Computer Science – LogiCS, are deeply moved by these dev

DocID: 1sRSo - View Document