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Configurable Computing: Fabrics and Systems BEE2: A High-End Reconfigurable Computing System Chen Chang, John Wawrzynek, and
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Document Date: 2008-02-23 02:46:56


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File Size: 127,12 KB

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Company

Texas Instruments / AMD / Xilinx / Altera / Intel / Cray / Starbridge Systems / MGT 100 Base-T Ethernet Memory / /

Currency

USD / AMD / /

Event

M&A / /

Facility

Berkeley Wireless Research Center / University of California / Xilinx System Generator library / Robert W. Brodersen University of California / MHz complex / /

IndustryTerm

physical-layer processing / final hardware / filter bank / cost-efficient solutions / time division multiple access protocols / wireless communications systems / reconfigurable devices / emulation applications / 1U dual-processor computer server / datapath-intensive streaming applications / memory systems / latency mesh network / ever-increasing digital-processing capability / tree communication network / software-configurable / strict real-time requirement / reconfigurable systems / energy / metal / benchmark applications / network switch technologies / Real-time scientific computing / automation tools / level compiler technology / bandwidth real-time devices / data processing / representative applications / software mapping tools / bank / actual hardware / real-time processing / tional microprocessor cluster solutions / radio astronomy signal-processing domain / design automation tools / large multiprocessor systems / economic solution / economical solution / Internet Protocol / hardware synthesis tool / computing / real-time requirements / connection schemes to accommodate various applications / communication networks / physical systems / real-time digital signal processing / ad hoc sensor network / dataflow processing nature / cell phone base station processing / integrated solution / conventional microprocessor systems / software-defined-radio design / tional processors / real-time applications / hardware implementation technologies / real-time scientific computation / communication applications / out-ofband communication network / desktop processors / wireless communication systems / software systems / large systems / real-time hyperspectral imaging / process technology / hardware implementation technology / microprocessor applications / rapid technology / hardware technology / communication network / digital-signal-processing applications / hard real-time throughput / lter bank / mature compilation tools / on-chip / digital signal processing / /

MarketIndex

DSP / /

MusicAlbum

Over / /

MusicGroup

MHz / /

OperatingSystem

Linux / /

Organization

FPGA / Berkeley Wireless Research Center / ASIC / Extraterrestrial Intelligence / University of California / Berkeley / Robert W. Brodersen University / /

Person

John Wawrzynek / MGT DRAM / MGT DRAM DRAM DRAM / /

Position

synchronous dataflow model for DSP and communication applications / representative / Memory controller / Gbyte/s controller controller / controller / /

Product

BEE2 system / Computational / XD1 system / XD1 / BEE2 / /

ProgrammingLanguage

DC / C / Verilog / Simulink / T / C++ / /

ProvinceOrState

California / /

PublishedMedium

IEEE Design & Test of Computers / /

Technology

FPGA / universal serial bus / RAM / underlying hardware implementation technology / Linux / SRAM / process technology / VHDL / packet-switched / application algorithm / Verilog / four hardware implementation technologies / individual DSP chips / spectroscopy / network switch technologies / GSM / 90-nm CMOS technology / high-level compiler technology / CAD / full-duplex / desktop processors / CDMA / IP / wireless communications / accelerator board / DSP processors / access protocols / hardware technology / Digital Video / circuit-switched / Ethernet / cellular telephone / microprocessors Processor / ASIC / PCI-X / simulation / DSP / Typical same 130-nm CMOS technology / Gigabit Ethernet / /

URL

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