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An 84-mW 4-Gb/s Clock and Data Recovery Circuit for Serial Link Applications M.-J. Edward Lee1,3, William J. Dally1,3, John W. Poulton2,3, Patrick Chiang1, and Stephen F. Greenwood1 1Stanford 2UNCAdd to Reading ListSource URL: cva.stanford.eduDownload Document from Source WebsiteFile Size: 152,04 KBShare Document on Facebook |