C vs. VHDL: Benchmarking CAESAR Candidates Using High-‐Level Synthesis and Register-‐Transfer Level Methodologies Ekawat Homsirikamol, Wi

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Date: 2015-10-04 23:56:37		C vs. VHDL: Benchmarking CAESAR Candidates Using High-‐Level Synthesis and Register-‐Transfer Level Methodologies Ekawat Homsirikamol, Wi Add to Reading List Source URL: www1.spms.ntu.edu.sg Download Document from Source Website File Size: 3,58 MB Share Document on Facebook