| Document Date: 2012-08-15 21:59:31
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City New York / / Company Application-Based Systems / TSMC / Intel Corporation / Embedded Systems / ACM Inc. / Vertex / / Country Nepal / United States / / Currency USD / / / Event Product Issues / / Facility Penn Plaza / KRISHNA V. PALEM Georgia Institute / Georgia Institute of Technology / / / IndustryTerm μm technology / random neural networks / algorithm-architecture-technology navigation / host processor / implement applications / probabilistic algorithm / energy performance product gain / technology characteristics / energy-efficient probabilistic computing / low energy consumption / conventional low-energy / system-on-a-chip / identical probabilistic algorithm / energy savings / probabilistic applications / energy / real-world applications / algorithm-architecture-technology / probabilistic systemon-a-chip / application-level energy / energy consumption / probabilistic computing / redundant systems / energy performance product / energy dissipation / energy modeling techniques / probabilistic algorithms / probabilistic technology / probabilistic system-on-a-chip / technology scaling / technology generations / deterministic algorithm / energy modeling / Energy efficiency / manufacturing / computing systems / computing / low-energy / software executing / candidate applications / pseudorandom number generators implemented in software / test chip / main technology / included designing redundant systems / / OperatingSystem Microsoft Windows / / Organization Institute of Technology Parameter / Georgia Institute of Technology / Computer Systems Organization / / Person Rabin / KRISHNA V. PALEM / / / Position Architecture Styles General / author / contact author / / Product logic gates / logic elements / modes / / ProvinceOrState New York / / Technology PSOCs using PCMOS technology / PCMOS technology / probabilistic algorithms / PCMOS test chip / Probabilistic System-on-a-Chip / StrongARM SA-1100 processor / 3.1 PCMOS Technology / 9 Table I. Algorithms / system-on-a-chip / SA-1100 host processor / probabilistic systemon-a-chip / main technology / probabilistic algorithm / encryption / 0.25 μm technology / probabilistic transition rule Hyper-Encryption / host processor / thermodynamics / actual SA-1100 processor / neural network / Security Message encryption / identical probabilistic algorithm / deterministic algorithm / simulation / probabilistic technology / / URL http /
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Probabilistic System-on-a-Chip Architectures LAKSHMI N. CHAKRAPANI, PINAR KORKMAZ, BILGE E. S. AKGUL, and KRISHNA V. PALEM Georgia Institute of Technology Parameter variations, noise susceptibility, and increasing energ