Linearizability

Results: 416



#Item
261Kernel / Thread / Spinlock / Parallel computing / Linux kernel / Hybrid kernel / Operating system / Critical section / Linearizability / Computer architecture / Computing / Concurrency control

2nd USENIX Symp. on Experiences with Distributed and Multiprocessor Systems, Atlanta, GA, March 1991, pp. 105–116 Kernel-Kernel Communication in a Shared-Memory Multiprocessor t Eliseu M. Chaves, Ir:

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Source URL: www.cs.rochester.edu

Language: English - Date: 2011-03-28 15:17:09
262Concurrent computing / Transaction processing / Programming language implementation / Software transactional memory / Parallel computing / Interrupt handler / Thread / Linearizability / CPU cache / Computing / Concurrency control / Computer architecture

Alert-on-Update: A Communication Aid for Shared Memory Multiprocessors ∗ Michael F. Spear Arrvindh Shriraman Hemayet Hossain Sandhya Dwarkadas

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Source URL: www.cs.rochester.edu

Language: English - Date: 2007-01-16 17:55:03
263Computer programming / Lock / Software transactional memory / Non-blocking algorithm / Linearizability / Readers–writer lock / Algorithmic efficiency / Skip list / Test-and-set / Concurrency control / Computing / Data management

Compiler Aided Manual Speculation for High Performance Concurrent Data Structures ∗ Lingxiang Xiang Michael L. Scott

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Source URL: www.cs.rochester.edu

Language: English - Date: 2013-01-07 09:48:21
264Computing / Data / Software transactional memory / Linearizability / Transactional memory / Bloom filter / Control flow / Lock / Concurrency control / Transaction processing / Data management

Transactional Memory Retry Mechanisms∗ Michael F. Spear, Andrew Sveikauskas, and Michael L. Scott Technical Report #935 Department of Computer Science, University of Rochester {spear, asveikau, scott}@cs.rochester.edu

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Source URL: www.cs.rochester.edu

Language: English - Date: 2008-08-09 00:20:11
265Computing / Data / Databases / Software transactional memory / Snapshot isolation / Schedule / Linearizability / Serializability / Garbage collection / Transaction processing / Concurrency control / Data management

TRANSACT[removed]Unmanaged Multiversion STM ∗ Li Lu Michael L. Scott

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Source URL: www.cs.rochester.edu

Language: English - Date: 2012-02-15 11:38:38
266Concurrency / Lock / Spinlock / Mutual exclusion / Scheduling / Linearizability / Critical section / Parallel computing / Concurrency control / Computing / Computer programming

LNCS[removed]Preemption Adaptivity in Time-Published Queue-Based Spin Locks

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Source URL: www.cs.rochester.edu

Language: English - Date: 2012-10-14 21:40:07
267Computing / Data / Software transactional memory / CPU cache / Linearizability / Lock / Database / Extensible Storage Engine / Redo log / Transaction processing / Data management / Concurrency control

Nonblocking Transactions Without Indirection Using Alert-on-Update ∗ Michael F. Spear, Arrvindh Shriraman, Luke Dalessandro, Sandhya Dwarkadas, and Michael L. Scott

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Source URL: www.cs.rochester.edu

Language: English - Date: 2007-03-22 21:05:08
268Data / Information / Databases / Rock / Serializability / Linearizability / Transactional memory / Algorithms for Recovery and Isolation Exploiting Semantics / Lock / Transaction processing / Concurrency control / Data management

Hybrid NOrec: A Case Study in the Effectiveness of Best Effort Hardware Transactional Memory ∗ Luke Dalessandro1 Franc¸ois Carouge2 Sean White2 Yossi Lev3 Mark Moir3 Michael L. Scott1

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Source URL: www.cs.rochester.edu

Language: English - Date: 2011-01-16 21:02:35
269Data / Computing / Software transactional memory / Linearizability / Transactional memory / Serializability / Lock / Rock / Parallel computing / Transaction processing / Concurrency control / Data management

Hybrid TM Using NOrec STM ∗ Luke Dalessandro, Michael F. Spear,† University of Rochester

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Source URL: www.cs.rochester.edu

Language: English - Date: 2010-02-01 10:26:20
270Concurrency / Compare-and-swap / Linearizability / Non-blocking algorithm / Test-and-set / Load-link/store-conditional / CPU cache / Parallel computing / Transactional memory / Concurrency control / Computing / Computer architecture

Fourth Workshop on Scalable Shared Memory Multiprocessors, Chicago, IL, April 1994 Scalable Atomic Primitives for Distributed Shared Memory Multiprocessors (Extended Abstract)

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Source URL: www.cs.rochester.edu

Language: English - Date: 2011-03-27 18:54:48
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