Back to Results
First PageMeta Content
SystemC / Models of computation / Transaction-level modeling / E / Thread / Petri net / Electronic engineering / Hardware verification languages / Hardware description languages


Formal Verification of SystemC Designs Using a Petri-Net Based Representation Daniel Karlsson, Petru Eles, Zebo Peng Department of Computer and Information Science, Linköpings universitet, Sweden {danka, petel, zebpe}@i
Add to Reading List

Document Date: 2006-03-23 11:50:34

Open Document

File Size: 284,68 KB

Share Result on Facebook

City

L.A. / /

Company

RTL / Automatic Hardware / Intel / MIT Press / Embedded Systems / /

/

Facility

port Figure / /

IndustryTerm

electronic devices / communication protocol / hardware/software / avionics applications / /

OperatingSystem

Linux / /

Organization

Zebo Peng Department of Computer and Information Science / MIT / /

Person

Daniel Karlsson / D.A. Peled / /

Position

Model Checking / arbiter / address bus and data bus / guard / scheduler / forward / designer / arbiter / and the arbiter / arbiter / the scheduler / arbiter / arbiter / and masters and slaves / /

Product

t10 / /

Technology

communication protocol / simulation / Linux / /

URL

http /

SocialTag