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Hardware description languages / Formal methods / Logic in computer science / Verilog / Application-specific integrated circuit / E / Random test generator / Formal verification / Verification / Electronic engineering / Electronic design automation / Hardware verification languages


[removed]David Jeffrey Ljung Madison - Resume David Jeffrey Ljung Madison Programming, Algorithm Design/Development, VLSI / CPU Verification
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Document Date: 2014-06-11 01:47:55

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File Size: 146,06 KB

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Company

DaveSource Consulting / Hewlett Packard / Transmeta Corp. / David Jeffrey Ljung Madison - Resume Hardware / SandCraft Inc. / iCelero LLC / /

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Facility

University Of Wisconsin / /

IndustryTerm

tool chain / album software / web apps / personnel tools / implemented operations management algorithms / fail search/eval / Post silicon debug/tools / software design/implementation / image sorting software / /

OperatingSystem

Unix / /

Organization

VLSI Technology Lab / University of Wisconsin / Madison / /

Person

Marginal Hacks / David Jeffrey Ljung Madison / /

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Position

Shareware Programmer / checkers and evaluators Tools writer / Contractor / Work Experience Director of Verification / CPU Verification Engineer / verification engineer / controller / VLIW CPU Independent Consultant / /

ProgrammingLanguage

Perl / Java / Verilog / C / /

Technology

implemented operations management algorithms / verilog / Java / perl / CAD / /

URL

http /

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