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![]() | Document Date: 2006-02-28 10:38:47Open Document File Size: 164,72 KBShare Result on FacebookCompanyIBM / / /FacilityFPU’s pipeline / FP opera / IBM T. J. Watson Research Center / /IndustryTerminterconnect network / computational-bound algorithm / system software stack / bank / systems-on-a-chip / intrachip synchronization hardware / software threads / sparse-matrix vector product / software thread / particular target applications / sparse matrix-vector product / manufacturing technology / unbalanced processing / compiler technology / software simulation environment / communications hardware / near-future silicon technology / computation-bound algorithm / system software / /MarketIndexFFT / SPARSE / /OperatingSystemUnix system / GNU / POSIX / /OrganizationMIT / /PersonGeorge Alm´asi / Thomas J. Watson / Derek Lieber / Henry S. Warren / Jr. / Monty Denneau / /Positionhardware architect / architect / /ProgrammingLanguageFP / C++ / /ProvinceOrStateManitoba / New York / /Technologycomputational-bound algorithm / computation-bound algorithm / chip design / floating point unit / silicon technology / Unix system / Introduction Multiprocessor systems-on-a-chip / system-on-a-chip / paging / 0218 Abstract Multiprocessor systems-on-a-chip / simulation / operating systems / Cyclops processors / same chip / compiler technology / Cyclops chip / /SocialTag |