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Digital signal processors / Digital signal processing / Microprocessors / MDSP / Multi-core processor / Dynamic random-access memory / Direct memory access / CPU cache / CEVA / Inc. / Computer hardware / Computing / Computer memory


HC17.S4T4 An Ultra High Performance Scalable DSP Family for Multimedia.ppt
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Document Date: 2013-07-27 23:46:54

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File Size: 1,07 MB

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Company

DSP Cores REGISTER BANK / /

IndustryTerm

process technologies / stream pre-processing / low-level command/status/data processing / it easy to scale software / media processing software / media processing challenges / /

Organization

Stanford / /

Person

Erik Machnicki / /

Position

General / CT3616 Block Diagram DDR Controller Global Functions PCI / transfers ARB ATU/Remap DDR Controller / /

Technology

SHARED MEMORY / Cell processor / DSP / process technologies / /

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