| Document Date: 2015-01-15 03:13:44
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Company Intel / Embedded Systems / / Currency pence / / / Facility Christoph Ehrenh¨ofer Graz University of Technology / K library / / IndustryTerm deployed systems / performance computing / Wireless Sensor Nodes / low-energy cipher design / low-energy designs / Software implementation / typical applications / industrial applications / above mentioned applications / communication systems / software implementations / low area low energy high throughput / explored algorithm / data processing phase / low energy consumption / cryptographic co-processor / authenticated encryption applications / default solution / certain demanding applications / low-energy microprocessors / typical authenticated encryption applications / energy / / Organization ASIC / EPC / Institute for Applied Information Processing and Communications / Graz University of Technology / / Person Cadence NanoRoute / A SCON / Ai / Erich Wenger / Hannes Groß / Christoph Ehrenh / Christoph Dobraunig / / Position straight-forward / candidate / / Technology encryption / FPGA / cryptography / ASIC / SCON-128 hardware implementations Design Chip / pure algorithms / cryptographic co-processor / SCON algorithm / Radio Frequency / secret key / gigabit / 130 nm low-leakage UMC technology / VHDL / Gigabit Ethernet / / URL http /
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Suit up! Made-to-Measure Hardware Implementations of A SCON Hannes Groß, Erich Wenger, Christoph Dobraunig, and Christoph Ehrenh¨ofer Graz University of Technology, Institute for Applied Information Processing and Comm