<--- Back to Details
First PageDocument Content
Cache / Compiler optimizations / Computing / Computer architecture / Computer memory / Computer engineering / Locality of reference / Software optimization / Cache replacement policies / Loop optimization / Memory hierarchy / Loop interchange
Date: 2009-02-13 05:39:10
Cache
Compiler optimizations
Computing
Computer architecture
Computer memory
Computer engineering
Locality of reference
Software optimization
Cache replacement policies
Loop optimization
Memory hierarchy
Loop interchange

Static Prediction of Worst-case Data Cache Performance in the Absence of Base Address Information Diego Andrade, Basilio B. Fraguela and Ram´on Doallo University of A Coru˜na, Spain {dcanosa,basilio,doallo}@udc.es

Add to Reading List

Source URL: www.des.udc.es

Download Document from Source Website

File Size: 408,00 KB

Share Document on Facebook

Similar Documents

Leveraging Gate-Level Properties to Identify Hardware Timing Channels Jason Oberg∗ , Sarah Meiklejohn∗ , Timothy Sherwood† and Ryan Kastner∗ ∗ Computer  Science and Engineering, University of California, San Di

Leveraging Gate-Level Properties to Identify Hardware Timing Channels Jason Oberg∗ , Sarah Meiklejohn∗ , Timothy Sherwood† and Ryan Kastner∗ ∗ Computer Science and Engineering, University of California, San Di

DocID: 1xVVy - View Document

Is Interaction Necessary for Distributed Private Learning? Adam Smith∗ , Abhradeep Thakurta† , Jalaj Upadhyay∗ of Electrical Engineering and Computer Science, Pennsylvania State University, Email: {asmith, jalaj}@p

Is Interaction Necessary for Distributed Private Learning? Adam Smith∗ , Abhradeep Thakurta† , Jalaj Upadhyay∗ of Electrical Engineering and Computer Science, Pennsylvania State University, Email: {asmith, jalaj}@p

DocID: 1xVSf - View Document

Baris Kasikci Assistant Professor Electrical Engineering and Computer Science University of Michigan 4820 BBB 2260 Hayward Street

Baris Kasikci Assistant Professor Electrical Engineering and Computer Science University of Michigan 4820 BBB 2260 Hayward Street

DocID: 1xVL2 - View Document

Education Sharif University of Technology, Tehran, Iran BS in Computer Engineering - Software Engineering Grade Point Average: 18.29 out of 20 GPAKasra Edalat Nejad

Education Sharif University of Technology, Tehran, Iran BS in Computer Engineering - Software Engineering Grade Point Average: 18.29 out of 20 GPAKasra Edalat Nejad

DocID: 1xVB5 - View Document

Automatic Generation of Local Repairs for Boolean Programs Roopsha Samanta, Jyotirmoy V. Deshmukh and E. Allen Emerson Department of Electrical and Computer Engineering and Department of Computer Sciences, The University

Automatic Generation of Local Repairs for Boolean Programs Roopsha Samanta, Jyotirmoy V. Deshmukh and E. Allen Emerson Department of Electrical and Computer Engineering and Department of Computer Sciences, The University

DocID: 1xVs1 - View Document