F ORESHADOW: Extracting the Keys to the Intel SGX Kingdom with Transient Out-of-Order Execution Jo Van Bulck1 , Marina Minkin2 , Ofir Weisse3 , Daniel Genkin3 , Baris Kasikci3 , Frank Piessens1 , Mark Silberstein2 , Thom

First Page		Document Content
Date: 2018-08-31 11:04:52 Computer architecture Computing Computer hardware Computer memory Cache Computer security X86 architecture Central processing unit Software Guard Extensions Meltdown CPU cache Spectre		F ORESHADOW: Extracting the Keys to the Intel SGX Kingdom with Transient Out-of-Order Execution Jo Van Bulck1 , Marina Minkin2 , Ofir Weisse3 , Daniel Genkin3 , Baris Kasikci3 , Frank Piessens1 , Mark Silberstein2 , Thom Add to Reading List Source URL: foreshadowattack.eu Download Document from Source Website File Size: 620,11 KB Share Document on Facebook

	This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE/ACM TRANSACTIONS ON NETWORKING 1 Milking the Cache Cow With Fairness DocID: 1xVD7 - View Document
	CacheQuote: Efficiently Recovering Long-term Secrets of SGX EPID via Cache Attacks DocID: 1xVnr - View Document
	RobinHood: Tail Latency-Aware Caching Dynamically Reallocating from Cache-Rich to Cache-Poor Daniel S. Berger (CMU) Joint work with: Benjamin Berg (CMU), Timothy Zhu (PennState), Siddhartha Sen (Microsoft Research), Mor DocID: 1xV9M - View Document
	Learning gem5 – Part III Modeling Cache Coherence with Ruby and SLICC Jason Lowe-Power http://learning.gem5.org/ https://faculty.engineering.ucdavis.edu/lowepower/ DocID: 1xUst - View Document
	Checking Cache-Coherence Protocols with TLA+ Rajeev Joshi HP Labs, Systems Research Center, Palo Alto, CA. Leslie Lamport Microsoft Research, Mountain View, CA. DocID: 1xUq9 - View Document