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Sandy Bridge / Intel Core / Nehalem / Cache / Central processing unit / Computer memory / Sandy Bridge-E
Date: 2014-01-06 07:53:19
Sandy Bridge
Intel Core
Nehalem
Cache
Central processing unit
Computer memory
Sandy Bridge-E

Design of Parallel and High-Performance Computing Fall 2013 Lecture: Roofline Instructor: Torsten Hoefler & Markus Püschel

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Source URL: spcl.inf.ethz.ch

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