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Graphics Hardware (2002), pp. 1–11 Thomas Ertl, Wolfgang Heidrich, and Michael Doggett (Editors)
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Document Date: 2009-06-17 12:43:51

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City

London / /

Company

IBM / MIT Press / Advanced Rendering Technologies / Nvidia / Programmable Graphics Hardware / Intel / /

Facility

Princeton University / Saarland University / D. Hall / PCI/AGP bridge / AGP bridge / /

IndustryTerm

iterative traversal algorithm / chip technology / basic algorithms / hyper-threading technology / given hardware / software approach / fragment processing / multiprocessor solution / rasterization chips / Parallel processing / ray tracing in hardware / production-type chip / ray tracing algorithm / graphics chips / real-time global illumination computations / rasterization hardware / purpose hardware / ray trace rendering processor / software implementation / rasterization algorithm / real-time frame / technology constant / graphics hardware / butterfly networks / algorithm computing light transport / memory technology / ray tracing hardware / real-time ray tracing / graphics systems / ray tracing chip / naive solution / /

OperatingSystem

L3 / /

Organization

Saarland University / MIT / Princeton University / Eurographics Association / /

Person

Jochen Röhrig / Michael Parker / Timothy Purcell / Stuart A. Green / Philipp Slusallek / Reid Gershbein / Thomas Ertl / Ian Buck / Michael Doggett / Craig Kolb / Kurt Akeley / M. J. Keates / Ray Tracing / Hugh Lauer / Peter Shirley / Carsten Benthin / Charles Hansen / William R. Mark / Jim Lawson / Homan Igehy / Pat Hanrahan / Steven Parker / Timothy J. Purcell / Jörg Fischer / Jan Hardenbergh / Ingo Wald / Michael J. Muuss / Ray Tracing Jörg Schmittler / Peter Bach / Derek J. Paddon / Jim Knittel / Cédric Lichtenau / Matt Pharr / Wolfgang Heidrich / Pike Sloan / Tony T.Y. Lin / C. Scott Ananian Greg Humphreys / Roger J. Hubbold / Mel Slater / Markus Wagner / Matthew Eldridge / Michael Bosch / Larry Seiler / Chuck Hansen / /

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Position

straight forward / external memory controller / memory controller / memory manager / /

Product

SaarCOR / /

ProgrammingLanguage

FP / /

ProvinceOrState

Manitoba / /

PublishedMedium

Computer Graphics / /

Technology

basic algorithms / RAM / 17.25 KB The algorithm / chip design / ray trace rendering processor / rasterization chips / API / SaarCOR chip / rasterization algorithm / PC133 SDRAM technology / SDRAM chips / memory technology / hyper-threading technology / Germany Abstract The ray tracing algorithm / graphics chips / load balancing / ray tracing algorithm / iterative traversal algorithm / production-type chip / wide SDRAM chips / four SDRAM chips / SaarCOR Chip The SaarCOR chip / 3D graphics / ray tracing chip / SDRAM / Ray Tracing Algorithm The ray tracing algorithm / chip technology / simulation / Parallel processing / CAD / /

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