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Central processing unit / Microprocessors / Parallel computing / Instruction set architectures / CPU cache / X86 / Multithreading / Multi-core processor / Microarchitecture / Computer architecture / Computer hardware / Computing


1 Directoryless Shared Memory Architecture using Thread Migration and Remote Access Keun Sup Shim∗ , Mieszko Lis∗ , Omer Khan‡ and Srinivas Devadas∗ ∗ Massachusetts
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Document Date: 2014-05-09 15:17:07


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File Size: 903,00 KB

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Cambridge / /

Company

C C Hardware Hardware / /

Facility

Massachusetts Institute of Technology / University of Connecticut / /

IndustryTerm

energy costs / distributed cache coherence protocols / directory-free remote access protocol / parallel processing / directory coherence protocols / coherence protocol / coherence protocols / directory cache coherence protocols / remote access protocol / flit network / /

Organization

Massachusetts Institute of Technology / University of Connecticut / Shared-L2 / /

Person

Omer Khan / Srinivas Devadas / /

ProvinceOrState

Massachusetts / Connecticut / /

Technology

coherence protocol / CT Abstract Distributed directory cache coherence protocols / remote access protocol / machine learning / simulation / distributed cache coherence protocols / directory-free remote access protocol / Shared Memory / parallel processing / distributed directory coherence protocols / coherence protocols / /

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