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 Date: 2015-01-10 06:34:49Integrated circuits Automatic test pattern generation Linear-feedback shift register Built-in self-test Scan chain Hardware Trojan |
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| First Page | Document Content | |
|---|---|---|
Date: 2015-01-10 06:34:49Integrated circuits Automatic test pattern generation Linear-feedback shift register Built-in self-test Scan chain Hardware Trojan |
Add to Reading List |
Low Power MSIC Signatures for Effective BIST Design Chekka Narasimha Rao M.Tech Student, Audi Sankara Institute of Technology, NH-5 Bypass Road, East Gudur Rural, Andrapradesh