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An Evaluation of Selective Depipelining for FPGA-based Energy-Reducing Irregular Code Coprocessors Jack Sampson, Manish Arora, Nathan Goulding-Hotta, Ganesh Venkatesh, Jonathan Babb+ , Vikram Bhatt, Steven Swanson, and M
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Document Date: 2011-08-22 21:37:18
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