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CPU cache / Dynamic random-access memory / Refresh rate / Cache / Three-phase / Computer memory / Computer hardware / Computing


Refrint: Intelligent Refresh to Minimize Power in On-Chip Multiprocessor Cache Hierarchies Aditya Agrawal, Prabhat Jain, Amin Ansari and Josep Torrellas University of Illinois at Urbana Champaign http://iacoma.cs.uiuc.ed
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Document Date: 2013-03-29 16:25:52


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File Size: 1,29 MB

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City

Shenzen / /

Country

China / /

Facility

Josep Torrellas University of Illinois / /

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energy small / energy reductions / energy / /

OperatingSystem

L3 / /

Organization

University of Illinois / /

Person

Amin Ansari / /

Position

WB / /

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SRAM / /

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http /

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