First Page | Meta Content | |
---|---|---|
![]() | Document Date: 2009-02-13 12:12:34Open Document File Size: 543,87 KBShare Result on FacebookCompanyAES / Freescale Semiconductor Inc. / /Currencypence / /EventFDA Phase / /FacilitySPHYs Console Port / DDR2/DDR3 DUART Console Port / /IndustryTermsecurity cryptographic processing / streaming data services / data path processors / storage applications / processor / baseband processing / bank sizes / process technology / programmable solution / software options / protocol processor / memory bank / telecommunications applications / control processing / external host processor / multicore baseband processing / communication protocols / directly-attached memory devices / precision time protocol / integrated communications processor / wireless infrastructure / /OrganizationUnited Nations / Eight-way / Core and Memory Unit / U.S. Securities and Exchange Commission / /PositionUTOPIA/POS-PHY L2 bus controller / DMA controller / MURAM Interrupt Controller / local bus controller / Controller / advanced Ethernet scheduler / DDR controller / /ProductSTS / ARC4 / SHA-1 / RapidIO / IPv6 / /RadioStationCore / /Technologyencryption / Ethernet / DDR SDRAM / IPv6 / separate processor / Power Architecture™ technology / public key / load balancing / QUICC Engine technology / 2 SGMII Four-Lane SerDes Time Slot Assigner On-Chip / four RISC processors / Network Interface Card / SONET / JTAG / protocol processor / data path processors / MAC address / data encryption / IEEE 1588™ precision time protocol / ATM / external host processor / Four chip / GSM / IPv4 / SDRAM / SRAM / 45-nm SOI process technology / communication protocols / Power Architecture technology / Quality of Service / integrated communications processor / SSL / DSP / RAID / FLASH / SS7 / Gigabit Ethernet / using MAC address / /SocialTag |