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Electronic engineering / Network On Chip / Field-programmable gate array / PCI Express / Packet switching / Advanced Microcontroller Bus Architecture / Network switch / Conventional PCI / Packet Processing / Computer buses / Computer hardware / Computing


Applying the Benefits of Network on a Chip Architecture to FPGA System Design WP[removed]White Paper
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Document Date: 2011-05-03 17:16:56


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File Size: 529,81 KB

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City

San Jose / /

Company

Qsys Scalability Systems / RTL / Altera Corporation / /

Country

United States / /

IndustryTerm

transport technology / slave router / communications subsystems / changes to any products / response network / transport layer protocol / transaction layer services / development software / frequency packet network / larger and more complex systems / packet networks / interconnect systems / response networks / networking techniques and technology / command network / time supporting high-performance systems / large high-performance systems / packet network / system integration tool / transport layer network / semiconductor products / transport services / transaction layer protocol / multi-hop network / on-chip / less-expensive mesh network / transport network / /

Organization

Separate Command / Optimized Command / /

Position

translator / system designer / arbiter / designer / alternate arbiter / DMA controller / representative / memory controller / Maximum Concurrency Packet Network Packet Network Arbiter Arbiter / /

Product

Quartus II development software / Avalon / Builder tool / NoC / NoC System / Quartus II / Qsys NoC / Builder / /

ProvinceOrState

California / /

Technology

semiconductor / FPGA / FPGA System / system algorithm / Ethernet / flash memory / transport layer protocol / transport technology / slave router / gigabit / transaction layer protocol / GUI / /

URL

www.altera.com/common/legal.html / www.altera.com / /

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