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Computing / Operations research / Instruction scheduling / Very long instruction word / Scheduling / No instruction set computing / Block scheduling / Schedule / List scheduling / Education / Scheduling algorithms / Planning


Inter-Block Scoreboard Scheduling in a JIT Compiler for VLIW Processors Technical Report A/392/CRI Benoˆıt Dupont de Dinechin STMicroelectronics STS/CEC
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Document Date: 2008-06-04 03:10:36

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File Size: 310,32 KB

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City

Open64 / /

Company

IBM / Texas Instruments / STMicroelectronics / Hewlett-Packard Laboratories / Microsoft / Dupont / /

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IndustryTerm

consumer electronics / system-on-chip / software pipelining / software pipelines / host processor / out-of-order superscalar processor / worklist algorithm / Media processing software / media processing applications / media processing application codes / systems-on-chip / prepass region scheduling algorithm / consumer electronics applications / computing / media processors / /

Person

Semi-Active Schedule / /

Position

cycle scheduler and the scoreboard scheduler / postpass scheduler / hardware scheduler / dynamic scheduler / scheduler / acyclic scheduler / /

ProgrammingLanguage

Java / C / C++ / /

Technology

cellular telephone / out-of-order superscalar processor / host processor / Java / ARM processors / system-on-chip / POWER4 processors / ST200 VLIW processors / scheduling algorithm / prepass region scheduling algorithm / media processors / worklist algorithm / VLIW processors / Lx technology / /

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