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Company BT / International Journal / / Country Italy / / / Facility University of Padova / / IndustryTerm parallel algorithms / parallel computing / coarse-grained parallel algorithms / decomposable parallel processor networks / regular cache-oblivious algorithm / sequential processor / parallel geometric algorithms / sequential algorithms / the√natural recursive algorithm / cacheoblivious algorithms / cacheoblivious sorting algorithm / component processor / simulation algorithm / external memory algorithms / regular cacheoblivious algorithm / cache-efficient algorithms / respective destination processors / cache-oblivious algorithms / cache-oblivious matrix multiplication algorithm / regular cacheoblivious matrix-transposition algorithm / cache-oblivious algorithm / / Organization DBSP MM / University of Padova / Parallel Programs Andrea Pietracaprina / Geppino Pucci / and Francesco Silvestri Department of Information Engineering / European Union / / Person Francesco Silvestri / / Position bridging model for parallel computation / algorithm designer / model for hierarchical memory / programmer / / ProvinceOrState British Columbia / / PublishedMedium Journal of the ACM / Communications of the ACM / Theory of Computing / / Technology RAM processors / simulation algorithm / parallel geometric algorithms / sequential processor / cacheoblivious sorting algorithm / cache-oblivious algorithms / D-BSP processors / ICM algorithm / regular cache-oblivious algorithm / fine-grained D-BSP algorithms / external memory algorithms / random access / two D-BSP algorithms / regular cacheoblivious algorithm / EM algorithms / coarse-grained parallel algorithms / destination processors / N/2i processors / regular cacheoblivious matrix-transposition algorithm / cache-oblivious algorithm / cache-oblivious matrix multiplication algorithm / component processor / D-BSP algorithms / D-BSP algorithm / I/Oefficient algorithms / caching / the√natural recursive algorithm / Simulation / DFT algorithms / ICM algorithms / Parallel Processing / respective destination processors / / SocialTag 
Cache-Oblivious Simulation of Parallel Programs Andrea Pietracaprina, Geppino Pucci, and Francesco Silvestri Department of Information Engineering, University of Padova, Italy {capri,geppo,silvest1}@dei.unipd.it Abstrac