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Date: 2004-06-29 10:13:46Cache Central processing unit Computer architecture CPU cache Hardware performance counter Memory hierarchy Cache algorithms Cache-oblivious algorithm Computer hardware Computer memory Computing | Architectural SupportAdd to Reading ListSource URL: mprc.pku.cnDownload Document from Source WebsiteFile Size: 1,31 MBShare Document on Facebook |
Journal of Algorithms–136 www.elsevier.com/locate/jalgor A locality-preserving cache-oblivious dynamic dictionary ✩ Michael A. Bender a,1 , Ziyang Duan a,∗ , John Iacono b , Jing Wu aDocID: 1sT9r - View Document | |
Cache Misses Prediction for High Performance Sparse Algorithms? Basilio B. Fraguela1 , Ram´on Doallo1 , and Emilio L. Zapata2 1 2DocID: 1smpo - View Document | |
Optimizing TTL Caches under Heavy-Tailed Demands Andrés Ferragut Ismael Rodríguez Fernando PaganiniDocID: 1rqor - View Document | |
Lecture 8: The Cache Oblivious Approach www.cs.illinois.edu/~wgropp Designing for Memory HierarchyDocID: 1rpNE - View Document | |
Chubby and BigTable Tom Anderson (based on slides from Dan Ports)DocID: 1rahd - View Document |