| Document Date: 2013-03-19 20:38:51
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City Hypertransport / / Company AES / PCI / ICAP / Xilinx Inc. / Virtex-5 FPGAs / IBM Corp. / / Country United States / / Facility Read port / ICAP port Advanced Flip-Chip Packaging / Store Support / stalls Programmable / Write port / / IndustryTerm signal-integrity flip-chip / daisy chain / look-up table technology / embedded systems / copper process technology / signal processing applications / logic applications / speed clock networks / availability/reliability infrastructure / differential termination on-chip / intellectual property security / implementation on-chip / Internet portal / metal / bank / soft processing solution / clock management / clock networks / / MusicGroup DSP / / NaturalFeature Fibre Channel / / OperatingSystem Cross-platform / / Organization Harvard / Auxiliary Processor Unit / ASIC / AllianceCORE / / Person Max RocketIO / Reed-Solomon encoder / Max Blocks / / / Position General / Digital Clock Manager / Tri-Mode Ethernet Media Access Controller / controller / / Product Endpoint block / Express / PowerPC / FPGAs / / TVStation Kbit / / Technology FPGA / bitwise logical operation modes SelectIO Technology / Full-duplex / RAM / hard-IP immersion Triple-oxide technology / ADC / MicroBlaze processor / 1000 Base-X implementation on-chip / parallel SelectIO technology / real 6-input look-up table technology / JTAG / 440 processors / differential termination on-chip / signal-to-PWR/GND ratios On-Chip / non-integer PLB-to-CPU clock ratios Auxiliary Processor / copper process technology / FPGA System / SelectIO™ technology / high-speed DSP algorithms / Ethernet / Virtex-5 FPGA ChipSync technology / PCI-X / SelectIO technology / voltage High signal-integrity flip-chip / 550 MHz Clock Technology / ASIC technology / compliant 128-bit Processor / DSP / 440 Processor / FLASH / Fibre Channel / / URL www.xilinx.com / /
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