![Hardware description languages / Open Verification Methodology / SystemVerilog / Verilog / SystemC / Synopsys / Application-specific integrated circuit / E / Aldec / Electronic engineering / Electronic design automation / Hardware verification languages Hardware description languages / Open Verification Methodology / SystemVerilog / Verilog / SystemC / Synopsys / Application-specific integrated circuit / E / Aldec / Electronic engineering / Electronic design automation / Hardware verification languages](https://www.pdfsearch.io/img/8ee1941586946244d32d1d6dfcb25a86.jpg)
| Document Date: 2012-05-02 18:00:58 Open Document File Size: 283,44 KBShare Result on Facebook
City San Jose / / Company Type Location Compensation Benefits Organization About Doulos Inc / Synopsys / Doulos America Inc / / Continent North America / / Facility North America Headquarters / / IndustryTerm high-tech regions / verification consulting services / / Organization ASIC / FSA / / Position SoC designer / verification engineer / / ProgrammingLanguage Verilog / / Technology semiconductor / VHDL / ASIC / Verilog / /
SocialTag |