Out Port / Po In Port / Carnegie Mellon University / In Port / University of Tehran Tehran / /
IndustryTerm
performance improvement solution / mesh-based on-chip networks / semiconductor technology / connected processing element / actual hardware / communication protocol / round robin algorithm / ith processing element / online fault detection / software program / large digital systems / default routing algorithm / /
Organization
University of Tehran Tehran / ASIC / Electrical and Computer Engineering School of Engineering / Politecnico di Torino / Carnegie Mellon University / CAD Research Laboratory Department of Electrical / /
Person
Frank Ghenassia / Ali Shahabi / Zainalabedin Navabi / Nima Honarmand / Hassan Sohofi / /
Position
editor / RT / programmer / /
Product
status / switches / spare link / destination field / switch / Although / switch SWi / mode / /
High-level Analysis for Reconfiguration of a Fault Tolerant Mesh-based NoC Architecture Using Transaction Level Modeling Homa Alemzadeh1, Fatemeh Refan1, Paolo Prinetto2, Zainalabedin Navabi1 1 CAD Research Laboratory