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Integrated circuits / Electromagnetism / Logic gates / Digital electronics / CMOS / Electronic design / Pass transistor logic / NMOS logic / Inverter / Logic families / Electronic engineering / Electronics


IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 32, NO. 7, JULYLow-Power Logic Styles: CMOS Versus Pass-Transistor Logic
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Document Date: 2006-05-18 16:42:51


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City

Manchester / Zurich / /

Company

PPL / B O VDD A VDD S VDD CO / O A O VDD B O CO / Integrated Systems Laboratory / O S A / F. Pass-Transistor Logic Styles (b) MUX2 (DPL) S A / CI A CO A S B B S A / CI B B CI A CO / B (a) (a) S A / CMOS VERSUS PASS-TRANSISTOR LOGIC CI S A / VDD S A / B S A / S B S (d) MUX2 (CPL) S A / CO S CI B CI A CO / /

Country

Switzerland / /

Currency

pence / /

Facility

Integrated Systems Laboratory / Swiss Federal Institute of Technology / /

IndustryTerm

metal / logic transistor networks / typical circuit applications / pull-up network / transistor networks / carrier drift velocities / logic networks / pass-transistor solution / process technology / pass-transistor network / passtransistor networks / pull-up logic network / power-delay products / synthesis tool / lowest power-delay products / deep-submicron technologies / power-delay product / pullup networks / process technology level / speed and low-power applications / circuit applications / conventional logic networks / energy / /

Organization

V PT / Swiss Federal Institute of Technology / US Federal Reserve / /

Person

Pass-Transistor Logic Reto Zimmermann / Wolfgang Fichtner / /

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Position

designer / representative / Corporal / /

Technology

2.8 2.8 2.8 3.3 process technology / simulation / deep-submicron technologies / process technology / /

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