Altera / Air Force Research Laboratory / Intel Corporation / Xilinx / /
Country
United Kingdom / /
Currency
USD / CRC / / /
Event
Product Issues / /
Facility
Simon W Moore Computer Laboratory University of Cambridge Cambridge / Link Target Bridge / PCI Express port / T. Bunker / Air Force Research Laboratory / SoC bridge / /
IndustryTerm
multiFPGA systems / on-chip network-based systems / bridge chip / correction protocol / vector processing / photonic networks / use Internet Protocol / network-off-chip / on-chip and off-chip networks / physical technologies / field-programable custom computing machine / network-on-chip / cluster systems / on-chip inteconnection networks / on-chip networks / local-area networks / network-off-chip systems / conventional networking / communications systems / technology-brief/thunderbolt-technology-brief.pdf / speed communication protocols / technology brief / vector processing system / computing / extreme-scale real-time neural network simulation / large chip / on-chip / vector processors / media converters / /
Organization
Moore Computer Laboratory University of Cambridge Cambridge / Infiniband Trade Association / Defense Advanced Research Projects Agency / RapidIO Trade Association / Department of Defense / /
Person
Avalon Streaming / Simon W Moore / Andrew Moore / Paul J Fox / /
Reliably Prototyping Large SoCs Using FPGA Clusters Paul J Fox, A Theodore Markettos and Simon W Moore Computer Laboratory University of Cambridge Cambridge, United Kingdom {paul.fox, theo.markettos, simon.moore}@cl.cam.