![Signoff / Synopsys / Waveform viewer / Standard cell / Design rule checking / Physical design / Electronic circuit simulation / Parasitic extraction / SystemVerilog / Electronic engineering / Electronic design automation / Digital electronics Signoff / Synopsys / Waveform viewer / Standard cell / Design rule checking / Physical design / Electronic circuit simulation / Parasitic extraction / SystemVerilog / Electronic engineering / Electronic design automation / Digital electronics](https://www.pdfsearch.io/img/57420bfc97bc05aa5f7550f3200e5cba.jpg)
| Document Date: 2014-11-07 14:28:38 Open Document File Size: 4,53 MBShare Result on Facebook
Company IPL / RTL / Synopsys Inc. / Tapeout Manufacturing / StarRC Custom / IC Compiler Custom Co-Design IC Compiler Custom / / Country United States / / IndustryTerm verification solution / mixed-signal solution / Typical applications / pattern-matching technology / circuit simulation technology / interoperable tools / postsimulation processing / field solver technology / vendor solution / reuse tools / file post-processor / / Organization IPL Alliance / / Person Visualization / Floorplan Floorplan / / Position physical designer / Layout Editing Galaxy Custom Designer / designer / mixed-signal IP portfolio Custom Designer / Custom Designer / SmartDRD technology / Custom Designer / / ProgrammingLanguage Verilog / RC / / Technology server farm / Verilog / pattern-matching technology / simulation / field solver technology / SmartDRD technology / VHDL / circuit simulation technology / file post-processor / CAD / / URL www.synopsys.com / http /
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