| Document Date: 2008-08-20 21:14:12
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City Seattle / / Company Debuggers / IBM / SoftSig / SourceForge.net / Their Operations Hardware / Intel / / Country United States / / Currency USD / / / Event Reorganization / / Facility GNU C library / Wonsun Ahn University of Illinois / I bar / Store Queue / / IndustryTerm memoization algorithm / generic memoization algorithm / software framework / possible solution / superscalar processor / presentation software / software routines / web browser / conventional superscalar processor / checkpointing — either in software / environment where hardware / per-processor / remote processors / cache coherence protocol / sequential applications / software interface / disambiguation in Hardware / / MarketIndex ROB / IPC / / OperatingSystem GNU / / Organization University of Washington / University of Illinois / National Science Foundation / Functional Unit / SESC / Computer Systems Organization / ICD SPM / / Person Luis Ceze / MIN STACK / James Tuck / Purpose Registers / / Position General General / reaches ROB head / General / head / Unlike General / programmer / / Product MemoiSE / / ProgrammingLanguage C++ / / ProvinceOrState Manitoba / Illinois / Washington / / PublishedMedium Baseline / / Technology generic memoization algorithm / functional programming / MemoiSE algorithm / conventional superscalar processor / caching / instant messaging / Memoization Framework Memoization algorithms / simulation / SMT processors / sequential consistency / cache coherence protocol / superscalar processor / memoization algorithm / local processor / /
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SoftSig: Software-Exposed Hardware Signatures for Code Analysis and Optimization ∗ James Tuck‡ ‡ NC State University