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Electronic design automation / Electronic design / Fabless semiconductor companies / Complex programmable logic device / Altera / Field-programmable gate array / Programmable logic device / Counter / Logic gate / Electronic engineering / Electronics / Digital electronics


Designing for High Speed-Performance in CPLDs and FPGAs Zeljko Zilic, Guy Lemieux, Kelvin Loveless, Stephen Brown, and Zvonko Vranesic Department of Electrical and Computer Engineering, University of Toronto, Canada emai
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Document Date: 1999-09-21 22:20:51

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File Size: 30,19 KB

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City

Toronto / Grenoble / /

Company

Altera Corporation / CPLDs / using CPLDs / /

Country

France / /

/

Facility

University of Toronto / /

IndustryTerm

computer systems / programmable logic devices / given device / dedicated carry chain / fewer product / synthesis software / slower device / carry chain hardware / smallest possible devices / approximate solutions / speed applications / /

Organization

Zvonko Vranesic Department of Electrical and Computer Engineering / US Federal Reserve / University of Toronto / /

Person

Lih-Jyh Weng / Douglas W. Clark / Guy Lemieux / Zeljko Zilic / Kelvin Loveless / Stephen Brown / /

Position

small bus interface controller / qualifier / designer / Controller / /

Product

Plus II / PLDs / FPGAs / Altera PLDs / /

PublishedMedium

IEEE Transactions on Computers / /

Technology

FPGA / finite state machine / CAD system / RISC processors / FPGA Technology / CAD / /

SocialTag