Reducing the Barriers to Writing Verified Specifications Todd W. Schiller Michael D. Ernst University of Washington

First Page		Document Content
Date: 2012-08-23 11:19:39 Theoretical computer science Formal methods Software engineering Computing Logic in computer science Java Modeling Language Postcondition Extended static checking Predicate transformer semantics ESC/Java Precondition KeY		Reducing the Barriers to Writing Verified Specifications Todd W. Schiller Michael D. Ernst University of Washington Add to Reading List Source URL: homes.cs.washington.edu Download Document from Source Website File Size: 1,08 MB Share Document on Facebook

	Advances in Programming Languages APL5: ESC/Java2 — The Java Extended Static Checker David Aspinall (including slides by Ian Stark and material adapted from ESC/Java2 tutorial by DocID: 1q2yP - View Document
	Advances in Programming Languages APL4: JML — The Java Modeling Language David Aspinall (slides originally by Ian Stark) School of Informatics DocID: 1pU1B - View Document
	Commoditizing Verification DocID: 1m4rE - View Document
	Reducing the Barriers to Writing Verified Specifications Todd W. Schiller Michael D. Ernst University of Washington DocID: 1loDT - View Document
	LogoUniversite_ParisSud_P DocID: 10tUQ - View Document