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Logic design / Hardware description languages / Field-programmable gate array / CADSTAR / Electronic design / VHDL / Place and route / Verilog / Logic synthesis / Electronic engineering / Digital electronics / Electronic design automation


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Document Date: 2011-05-12 04:19:55


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Company

Synopsys / Altera / CSV / RTL / CADSTAR FPGA / Xilinx / Actel / HDL / CADSTAR P.R. / P.R. / /

IndustryTerm

particular bank / intuitive implementation tools / bank / route tools / entry tools / route tool / design entry tools / manufacturing / interactive placement tools / project management / synthesis tools / collaborative product / breakpoint management / logic synthesis tools / /

Person

Leonardo Spectrum / XR HS / Block Diagram / /

Position

customizable Language Assistant / independent Design Flow Manager / universal project manager / Editor and Finite State Machine Editor / design flow manager / Editor / State Machine Editor / system architect / advanced HDL editor / designer / independent FPGA design flow manager / intuitive design flow manager / library editor / CADSTAR PCB design editor / Waveform Editor / Editor P.R.Editor / Description Language Editor / /

ProgrammingLanguage

Perl / Tcl/Tk / Verilog / Hardware Description Language / /

Technology

FPGA / Verilog / Finite State Machine / board design / Perl / simulation / VHDL / FPGA technology / GUI / verification The FPGA technology / /

URL

www.zuken.com / /

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