Self-Reconfigurable Parallel Processor Made From Regularly-Connected Self-Dual Code Data Processing Cells US Patent - Programmable Array Logic - Document - PDFSEARCH.IO

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Date: 1999-11-23 00:24:12 Digital electronics Computer hardware Digital circuits Flip-flop Shift register Programmable logic device Field-programmable gate array Logic gate Counter Electronic engineering Computer memory Electronics		Self-Reconfigurable Parallel Processor Made From Regularly-Connected Self-Dual Code/Data Processing Cells US Patent #5,886,537 Nicholas J. Macias, Lawrence B. Henry III and Murali Dandu Raju Abstract: A parallel processi Add to Reading List Source URL: www.cellmatrix.com Download Document from Source Website File Size: 1,40 MB Share Document on Facebook

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