FPGAs: High Assurance through Model Based Design AADL Workshop - Programmable Array Logic - Document - PDFSEARCH.IO

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	FPGAs: High Assurance through Model Based Design AADL Workshop Add to Reading List Document Date: 2007-02-01 15:39:06 Open Document File Size: 512,69 KB Share Result on Facebook Company RTL / Rockwell Collins Inc. / the AES / / / IndustryTerm reported software / wide operand processing / / Organization Los Alamos National Lab / / Person Yves LaCerte / Algorithm Finalists / / / Position Candidate / / ProgrammingLanguage Model transformation / C / Cedar / Verilog / / Technology Encryption / Block Cipher / FPGA / Gigabit / Verilog / Simulation / VHDL / pdf / / URL http / SocialTag Electronic design automation Field-programmable gate array Logic design Impulse C VHDL Verilog Logic simulation Parallel computing Rockwell Collins Electronic engineering

FPGAs: High Assurance through Model Based Design AADL WorkshopAdd to Reading List